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_SBT is the exclusive executive recruiting firm for this confidential position._
This confidential company is strategically bringing on a hands-on technical DV lead. In this role, the verification expert will be collaborating cross-functionally with a talented team of systems HW engineers and SW architects in developing cutting-edge computing systems. This individual will have first-hand involvement in the full lifecycle of complex chip development, solving complex challenges directly affecting tier-one customers.
Role
Verification Planning and Strategy
* Develop verification plans and strategies based on design specifications and requirements to ensure thorough testing and validation of semiconductor designs
* Create verification methodologies, test benches, and test cases to effectively verify and validate digital designs, including RTL (Register Transfer Level) designs
Building DV infrastructure
* Define and develop a comprehensive suite of verification infrastructure and tests that can be leveraged across both ASIC and FPGA platforms
* Collaborate with cross-functional teams to ensure that verification infrastructure and tests are aligned with design requirements and can be effectively used to validate designs
Qualifications
* Technical degree in a related engineering field
* 5-10+ years of relevant industry experience
* Proficiency in verification languages and methodologies, such as SystemVerilog and UVM
* Expertise in network switching data path-related technology is required
_Relevant company backgrounds include: AMD, Marvell, Cisco, Broadcom, Intel, Qualcomm, and other AI or networking companies_